ADCMP 562 PDF

Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing. Transit times from these sites may vary. The devices feature a ps propagation delay with less than 75 ps overdrive dispersion. Product Categories Analog Functions. The Sample button will be displayed if a model is available for web samples. The model has not been released to general production, but samples may be available.

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The devices feature a ps propagation delay with less than 75 ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of comparators.

A differential input stage permits consistent propagation delay with a wide variety of signals in the common-mode range from? The outputs provide sufficient drive current to directly drive transmission lines terminated in 50?

A latch input, which is included, permits tracking, track-and-hold, or sample-and-hold modes of operation. The latch input pins contain internal pull-ups that set the latch in tracking mode when left open.

A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P. Box , Norwood, MA , U. Tel: All rights reserved. A Changes to Specification Table Table 1. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges.

Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Pin Function Descriptions Pin No. One of two complementary outputs for Channel A. QA is logic high if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input provided the comparator is in compare mode.

See the description of Pin LEA for more information. QA is logic low if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input provided the comparator is in compare mode.

Logic Supply Terminal. One of two complementary inputs for Channel A Latch Enable. In compare mode logic high , the output tracks changes at the input of the comparator.

If left unconnected, the comparator defaults to compare mode. In compare mode logic low , the output tracks changes at the input of the comparator. Negative Supply Terminal. The inverting A input must be driven in conjunction with the noninverting A input. The noninverting A input must be driven in conjunction with the inverting A input.

Programmable Hysteresis Input. The noninverting B input must be driven in conjunction with the inverting B input. The inverting B input must be driven in conjunction with the noninverting B input. Positive Supply Terminal. One of two complementary inputs for Channel B Latch Enable. In latch mode logic high , the output reflects the input state just prior to placing the comparator in the latch mode.

In latch mode logic low , the output reflects the input state just prior to placing the comparator in the latch mode. One of two complementary outputs for Channel B. QB is logic low if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input provided the comparator is in compare mode.

QB is logic high if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input provided the comparator is in compare mode. See the description of Pin LEB for more information. Input Bias Current vs.

Input Offset Voltage vs. Rise Time vs. Temperature 2. Rise and Fall of Outputs vs. Fall Time vs. Temperature Rev. Propagation Delay vs. Temperature 80 60 40 20 0 0 0. Figure Comparator Hysteresis vs. Common-Mode Voltage 25 20 15 10 5 0 —5 0.

Propagation Delay Error vs. A Figure IHYS Rev. Table 4 describes the terms in the diagram. Table 4. Minimum time after the negative transition of the latch enable signal that the input signal must remain unchanged to be acquired and held at the outputs.

Minimum time the latch enable signal must be high to acquire an input signal change. Minimum time before the negative transition of the latch enable signal that an input signal change must be present to be acquired and held at the outputs. Difference between the differential input and reference input voltages. Consequently, high speed design techniques must be employed to achieve the best performance.

A ground plane, as part of a multilayer board, is recommended for proper high speed performance. Using a continuous conductive plane over the surface of the circuit board can create this, allowing breaks in the plane only for necessary signal paths. The ground plane provides a low inductance ground, eliminating any potential differences at different ground points throughout the circuit board caused by ground bounce.

A proper ground plane also minimizes the effects of stray capacitance on the circuit board. It is also important to provide bypass capacitors for the power supply in a high speed application. F electrolytic bypass capacitor should be placed within 0. These capacitors reduce any potential voltage ripples from the power supply.

These capacitors act as a charge reservoir for the device during high frequency switching. Leaving the latch inputs unconnected or providing the proper voltages disables the latching function. The inputs of the unused comparator should not be allowed to float. The high internal gain may cause the output to oscillate possibly affecting the comparator that is being used unless the output is forced into a fixed state.

The best performance is achieved with the use of proper PECL terminations. If high speed PECL signals must be routed more than a centimeter, microstrip or stripline techniques may be required to ensure proper transition times and prevent output ringing. High speed square waves transmitted over a distance, even tens of centimeters, can become distorted due to stray capacitance and inductance.

Poor layout or improper termination can also cause reflections on the transmission line, further distorting the signal waveform. A high speed comparator can be used to recover the distorted waveform while maintaining a minimum of delay.

The performance limits of high speed circuitry can be a result of stray capacitance, improper ground impedance, or other layout issues. Source resistance in combination with equivalent input capacitance could cause a lagged response at the input, thus delaying the output.

A combination of 3 k? Source impedances should be significantly less than ? Sockets should be avoided due to stray capacitance and inductance. If proper high speed techniques are used, the devices should be free from oscillation when the comparator input signal passes through the switching threshold.

Propagation delay overdrive dispersion is the change in propagation delay that results from a change in the degree of overdrive how far the switching point is exceeded by the input. Overdrive dispersion is defined as the variation in propagation delay as the input overdrive conditions are changed Figure The transfer function for a comparator with hysteresis is shown in Figure The new switching threshold becomes?

The comparator remains in a 1 state until the threshold? Positive feedback from the output to the input is often used to produce hysteresis in a comparator Figure The major problem with this approach is that the amount of hysteresis varies with the output logic levels, resulting in a hysteresis that is not symmetrical around zero. Hysteresis generated in this manner is independent of output swing and is symmetrical around the trip point.

A current source can also be used with the HYS pin.

IAM 81008 PDF

ADCMP 562 PDF

The devices feature a ps propagation delay with less than 75 ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of comparators. A differential input stage permits consistent propagation delay with a wide variety of signals in the common-mode range from? The outputs provide sufficient drive current to directly drive transmission lines terminated in 50? A latch input, which is included, permits tracking, track-and-hold, or sample-and-hold modes of operation. The latch input pins contain internal pull-ups that set the latch in tracking mode when left open.

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Nigrel If you need a 0 to 3. The Purchase button will be displayed if model is available for purchase online at Analog Devices or one of our authorized distributors. An Evaluation Board is a board engineered to show the performance of the model, the part is included on the board. Also, please note the warehouse location for the product ordered. Temperature ranges admcp vary by model.

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